Data Intensive Computing
Image/Video Content Analysis: Processing Streaming and Archived Video Data Using a Hybrid, Multi-core Framework
Challenge:
The use of image/video for surveillance, border control, and protection of critical infrastructure is on the increase. High-throughput, high performance methods, algorithms, codes and hardware are required to process the massive amounts of data associated with image and video collection to support timely, actionable decisions.
Using a data intensive computing framework, this demonstration shows how the content of massive amounts of streaming and archived video data can be analyzed at rates even faster than real-time.
Approach:
This demonstration will construct a social network graph of people who appear in a collection of video camera streams over time. Essentially we're looking to identify people who appear together in the video on multiple occasions to insinuate a relationship between them.
For this demonstration we use a hybrid, multi-core processing framework for performing high-throughput, high performance image/video analysis. We map a video processing workflow onto a network of multi-core processors to provide maximum performance per processing node.
There are three major components to this framework:
- the control network for directing the workflow,
- the data transport network for communicating the data between the nodes, and
- the processing nodes where the algorithmic work is being performed.
Impact:
This demonstration shows state-of-the-art capabilities in:
- High-throughput Image/Video Processing: Processing the massive amounts of data associated with image and video faster than real-time is critical to extracting and finding useful information in a timely fashion to support actionable decisions.
- Visual Analytics: The methods used in this demonstration make use of information content as a quantitative measure for extracting and recognizing patterns and features.
- High Performance Multi-Core Computing: The distributed network of hybrid, multi-core processors used for this demonstration represent the precursor for the next generation of multi-core hardware clips.
Programming Models: The programming models used for this demonstration represent the use of hierarchical parallel programming techniques and tools for managing the workflow associated with the control network, data transport network, and algorithmic processing.
